Performance Study and Analysis of Heterojunction Gate All Around Nanowire Tunneling Field Effect Transistor

Document Type : Articles


Department of Electrical Engineering, Khoy Branch, Islamic Azad University, Khoy, Iran


In this paper, we have presented a heterojunction gate all around nanowire
tunneling field effect transistor (GAA NW TFET) and have explained its characteristics
in details. The proposed device has been structured using Germanium for source region
and Silicon for channel and drain regions. Kane's band-to-band tunneling model has
been used to account for the amount of band-to-band tunneling generation rate per unit
volume of carriers which tunnel from valence band of source region to conduction band
of channel. The simulations have been carried out by three dimensional Silvaco Atlas
simulator. Using extensive device simulations, we compared the results of presented
heterojunction structure with those of Silicon gate all around nanowire TFET. Whereas
due to thinner tunneling barrier at the source-channel junction which leads to the
increase of carrier tunneling rate, the heterojunction gate all around nanowire TFET
shows excellent characteristics with high on-state current, superior transconductance
and high cut-off frequency.


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